资源列表
test
- FPGA最小系统测试程序，一个LED闪烁，一个LED点亮，可以完成最小系统的验证-Minimum FPGA system test procedure, an LED flashing, an LED light, can complete the minimum system verification
ds18b20
- 完成DS18B20单总线温度传感芯片的控制和读取，将数据16位并行传出-Complete chip DS18B20 single bus temperature sensor control and read, 16 bit parallel data coming
adc7923
- 完成AD7923的控制和数据读取,AD7923为四路AD，SPI输出接口-Complete the AD7923 control and data read, AD7923 as four-way AD, SPI output interface
fifo_mem
- 同步FIFO，IP核生成ram，已验证可用。-Synchronous FIFO, IP core generation ram, verified available.
TLC
- Vhdl code for traffic light controller
ram
- vhdl code for simple ram block
FPGA
- 西安交通大学数电FPGA实验代码，使用verilog编写-The code of XJTU s digital electronics experiment, wrote by Verilog.
ddr_top
- verilog语言ddr3读写程序，axi总线协议，用于ddr3读写测试-ddr3 read and write
half_adder
- 自己编写的半加器源代码，直接导入工程即可，请下载使用。-Written in their own half adder source code, you can directly import project, please download.
OWIRE
- OWIRE verilog代码，实现了单总线上的通信传输的HDL顶层，子模块设计和testbench内容-The code of 1wire bus
vga
- FPGA board universal VGA block
FPGA-SYSTEM-DESIGN-primer-EDK1-part1
- 赛灵思的FPGA中片上嵌入式系统EDK-大学生竞赛培训指导资料-FPGA SYSTEM DESIGN primer of EDK-1-part1.