资源列表
bujindianji
- 利用FPGA,VHDL语言的状态机设计步进电机驱动。-FPGA, VHDL language state machine design stepper motor driver. . .
ppt
- Verilog数字系统设计教程（夏宇闻）例题源程序 ppt-Verilog digital system design course (XiaYuwen) sample source program PPT
nnARM01_11_1_3
- arm的源码，由arm爱好者写成，已能过测试-the open core of arm
zhengyu
- 基于FPGA技术的等精度频率计设计代码，已通过调试-Based on FPGA technology, such as precision frequency meter design code has been through the debugging
IEEEStd1364_2001
- verilog 1364——2001 语言标准-Verilog Hardware Descr iption Language standard
singnal
- VHDL实现通用通信信号源，包括sin，cos，方波，三角波，BPSK，GMSK，ASK，16QAM等信号的产生以及DDS，PLL的VHDL系统代码-VHDL implementation of universal communication sources, including sin, cos, square, triangle, BPSK, GMSK, ASK, 16QAM and other signal generation and DDS, PLL system, the VHDL
FPGA--cepin
- 几个关于用vhdl 语言，编写测频，频率计程序的论文，希望对初学者有用！-Vhdl on the use of several languages, write frequency measurement, frequency meter program of papers, I hope useful for beginners!
manchester-decoder-encoder
- Manchester Encoder - Decoder-Manchester Encoder- Decoder
A_D_translate
- 利用实验板上的ADC0809做A/D转换器，实验板上的电位器提供模拟量输入，编制程序，将模拟量转换成二进制数字量，在数码管的最高两位显示出数字量来。另外要把模拟量值在数码管的最低三位显示出来。例如显示“80 2.50”（ 其中80是采样数值，而2.50是电压值。要求程序可连续运行以便测量不同的模拟电压（类似于电压表） （注意：多次采集求平均值可提高转换精度） -Experimental board do ADC0809 A/D converter, test board provides
5
- simple code based on verilog shifter , cla ,clg , ALU ,PC, decoder , tb_top
verilog-program
- 国外经典verilog程序集锦，含有从最简单的定时器创建到复杂逻辑的实现。-Classic Collection verilog program abroad, with the timer created from the most simple to complex logic.
FPGA_atel2_bin
- 用FPGA和单片机实现的串口设计，有源码-FPGA and MCU serial design, source