资源列表
FPGA_OS
- 一个FPGA芯片上搭建系统的实例，包含了内核的建立，及在内核上运行的简单程序。-FPGA chip to build a system example, contains a kernel build, and run in the kernel of simple procedures.
clock
- XPS做时钟的配置过程基于EXCD-1开发板,其实是基于xilinx的ISE来开发的，但是开发环境没有这个就这能选VHDL，另外是verilog的，呵呵。希望大家能够真正用上，挺好的“基于ISE的时钟”-XPS to do the configuration process is based on the clock EXCD-1 development board, in fact, is based on the xilinx the ISE to develop, but not the
watch
- 懂哥作品 用verilog编写的，我没试验呢开发板没有-verilog watch made by dongge
UART
- 基于FPGA的UART设计程序，程序完整测试成功，可以在此基础上完善-UART FPGA-based design process, the program successfully complete the test, you can improve on this basis
digit_clock
- 1) 计时计数器用24进制计时器电路。 2) 可手动校时，能清零及分别进行时、分、秒的校正。 3) 可整点报时，扬声器发出时长为1s的信号。 4) 可设置闹钟功能。当计时计到预定时间时，扬声器发出闹铃信号，可控制闹铃时长。 -clock
fpga
- fpga的入门教程。。很适合新手学习。基于ISE-fpga introductory tutorial. . Very suitable for beginners to learn. Based on ISE
Digital.Circuit.Design.VHDL
- 数字电路VHDL程序设计Digital Circuit Design VHDL program -Digital Circuit Design VHDL program
BEEP
- 在FPGA上实现BEEP的功能，并演奏歌曲-BEEP in the FPGA to achieve the function, and play the song
ps2
- FPGA的SP2端口的实现，将键盘扫描值在数码管上显示-SP2 port FPGA-implementation of the value of the keyboard scan is displayed on the digital
LampsSequencer
- FPGA流水灯实验，VERILOG编写，简单的学习程序-FPGA light water experiments, VERILOG written, simple learning process
vgaout
- VGA的程 序，可以显示红绿蓝三色在VGA-VGA program, you can display red, green and blue colors in VGA
decoder_38_vhdl
- FPGA的三八译码器的实现，VHDL编写-FPGA implementation of the March Eighth decoder, VHDL writing