资源列表
uart_verilog
- 三个用VHDL/VERILOG实现串口通信的程序。-Three with the VHDL/VERILOG achieve serial communication program.
altera_europa_support_lib
- FPGA 的高级运用原有代码，用于niosII的开发参考-NIOSII resources
red_FPGA_code.ZIP
- 红色飓风开发板上的练习源代码，内容包括基本FPGA设计实例，各种常用接口设计实例，SOPC设计实例等。-Red Hurricane source code practice development board, including the basic FPGA design example, a variety of common interface design examples, SOPC design examples and so on.
digitalclock
- 数字秒表，有六进制、十进制，顶层文件。很大方哈萨克活动时间啊客户-digitalclock
AD9857_b
- 芯片AD9857资料，英文版，此芯片可以实现基带处理，成型滤波，上变频等功能，希望对大家有用 好好看哦-Chip AD9857 information, in English, this chip can achieve baseband shaping filter, the frequency and other functions, we hope to be useful well Kane
Amateurcodekommentar.c
- Hello, i am 12 this is my first program
FinalTLC
- Traffic Light Controller
1
- 通过ADC0809的通道0采集电位器的值，并将其处理后通过DAC0832输出，该输出直接连接到ADC0809的通道1，并将IN0和IN1采集到的数据分别在LED和CRT上显示。-Channel 0 capture by ADC0809 potentiometer value and processed through the DAC0832 output, the output directly connected to the ADC0809' s Channel 1, and IN1
dflipflop
- d flipflop for verilog code
add8
- carry look ahead 8 bit adder
VGA_TEST
- 用verilog HDL实现的VGA接口，调试成功，能直接使用-Implemented using verilog HDL VGA interface, debugging success, can be used directly
shuzishizhong
- 用VHDL实现的数字时钟，源代码以调通，能够直接使用！-VHDL implementation of serial communication with the source code to adjust pass, can be used directly!