资源列表
incremental
- 这是基于DE2平台的增量式编译实验,对初学者很具有参考价值-This is based on incremental compilation DE2 platform experiment, a very useful reference for beginners
LIP6301CORE_tv_filter
- TV Filter VHDL Souece code
LIP6801CORE_audio_block
- Audip Block Verilog sourc code
LIP4301CORE_PCI
- PCI Verilog source code
LIP4331CORE_PCI
- PCI Peripherial Communication Interface BUS Verilog sourc code
LIP4101CORE_uart
- UART Verilog sourc code
LIP6311CORE_LCD_Interface
- LCD Interface Verilog source code
LIP1215CORE_clkdll
- Clock DLL Block verilog source code
fff
- 基于软件无线电数传电台的FPGA实现 -Based on software radio data transmitter FPGA Implementation
123
- 运用VHDL语言，使用FPGA技术，实现四相步进电机的细分步进控制驱动，让电机运行更加稳定，可以实现横转矩。-Using VHDL language, using the FPGA technology, four-phase stepper motor driver stepper control, so that motor run more stable, horizontal torque can be achieved
typegame_7-26_final
- 五个字母在屏幕上下落，击中即消并更新字母，实现打字游戏-VHDL code for typegame-- when you press the right key ,than the letter on the screen will update.
vhdlsample
- vhdl program for bcd conter to 7 segment display