资源列表
MMC_SD_interface
- sd card interface in altera kit de2
SPconversion_CPLD_FPGA_VHDL
- 基于状态机的8bit并串变换，使用VHDL语言，使用Xilinx ISE，程序特点是使用了状态机，通过分析可以学习如何使用状态机编程，并完成8bit并串变换的功能-8bit based on state machines and string transformation, using VHDL language, using the Xilinx ISE, process characterized by the use of the state machine, the analysis c
asy_FIFO
- 用Verilog实现FIFO的异步设计，里面有详细的代码和各个模块的代码，经过调试可以使用-asynchronous FIFO design
Xilinx_DCM
- 基于ise 10.0来实现Xilinx的时钟设计和管理-Xilinx dcm digital clock manager
clk_counter
- 计数器，可以通过数码管显示数字，包括了分频器，进制设定-clk_counter
lcd_fpga
- 在NIOSII环境中应用DE0硬件平台，实现字符在LCD上的显示以及七段译码的字符显示。-Application DE0 NIOSII environment in hardware platform, achieving in the LCD display on the character and the character seven-segment display decoder
eth_crc
- crc校验码Verilog 程序。此为4位并行crc——32校验。-crc checksum Verilog program. This is a 4-bit parallel crc- 32 check.
crc_testbench
- 此为crc测试台文件。主要环境是modelsim。适用于初学者-This is the crc test bench file. Main environment is modelsim. Apply to beginners
ampliFM100W
- 100w Amplifier very powerful
VHDLnew
- vhdl book by douglas berry
symbolsandnumericaldecomposition
- Verilog 语言，符号与数值的分解电路-verilog for symbols and numerical decomposition
FPGAtestpapers
- fpga 笔试题很全网上整理的，希望对大家有所帮助-fpga document is full on-line order of questions, we want to help