资源列表
seg_led_display
- 数码管灯控制程序，动态扫描过程。硬件连接方式比较特殊，位选单独控制，又是级联方式。6个数码管。-Digital tube light control applications, dynamic scanning process. Hardware connection is rather special, separate control of Choice, but also a cascade. 6 digital control.
six_led_display
- 数码管灯控制程序，动态扫描过程。硬件连接方式比较特殊，位选单独控制，又是级联方式。6个数码管。-Digital tube light control applications, dynamic scanning process. Hardware connection is rather special, separate control of Choice, but also a cascade. 6 digital control.
FPGA_verilog
- FPGA很有价值的27实例:如ASK、PSK、FSK调制与解调VHDL程序及仿真等-FPGA verilog
change
- 同步串并转换程序,1位串行输入，8位并行输出。-Synchronous series and the conversion process, a serial input, 8-bit parallel output.
ml50x_cpld_design
- 片具有高性能和低功耗的特点，主要应用在嵌入式系统。MPC7410是新一代G4处理器，通过加入AltiVec技术，处理能力达到4G FLOPS，而1.8 V的低电压操作大大降低了芯片的功耗，提高了系统的稳定性 来源：[http://www.jdzj.com]机电之家·机电行业电子商务平台！-erqwrq
serial_bus
- dahua串行总线参考设计，主要是针对dahua公司的器件进行，对于串行总线的开发者来说具有很好的参考价值。-xilinx serial bus reference design, the company mainly for Xilinx devices, the serial bus of the developers who have a very good reference value.
TestFre
- 通过时钟分频，用PWM脉冲调宽来控制LED灯亮度的强弱，改变PWM的占空比来实现恒流LED的亮度强弱控制-By the clock frequency, pulse width modulated using PWM to control LED brightness light intensity, changes in PWM duty cycle to achieve constant current LED brightness intensity control
VHDLpaomadeng
- 通过VHDL语言来实现类似跑马灯的控制，通过高电平的转移来实现灯光的转移，利用QuartusII开发平台-Through the VHDL language to achieve similar Marquee control, transfer through the high level to achieve the transfer of light, using QuartusII development platform
RGB
- RGB表示红色绿色蓝色的灯，通过三种灯光的顺序点亮可以实现彩色跑马灯的功能，里面加入了小小的暂停，如果光强比例合适的话，还可以发出白光-RGB red green and blue light that, by the order of three light colored marquees light up function can be achieved, which added a little pause, if the intensity ratio of the right wor
VHDLfangbo
- 通过VHDL语言实现一个方波，代码里含有两个进程，一个分频一个输出方波。里面含有两个代码，可以根据需要参考-VHDL language through a square wave, the code will contain two processes, a frequency of a square wave output. Which contains two code, you can reference as needed
cont10_v.sym
- 十进制计数器既可采用QuartusII的宏元件74160，也可用VHDL语言设计。在项目编译仿真成功后，将设计的十进制计数器电路设置成可调用的元件cont10_v.sym，用于4位十进制计数器的顶层设计。-Decimal counter can use QuartusII macro components 74160, also available VHDL language design. After the success of the project compiled simulation
DBF_multiroad_receiver_check_technology
- DBF技术是在原来模拟波束形成原理的基础上，引入数字信号处理方法之后建立的一门雷达新技术。数字波束形成就是用数字方式将由于传感器在空间位置不同引入的传播程差导致的相位差进行补偿，从而实现各路信号之间信号同相叠加，使得观测方向能量最大接收，形成特定方向上目标信号检测。-DBF technology is in the original analog beamforming based on principle, after the introduction of digital signal pr