资源列表
std_logic_signed
- 一套签署arithemtic、转换、及比较STD_LOGIC_VECTOR功能的程序。-A set of signed arithemtic, conversion,and comparision functions for STD_LOGIC_VECTOR.
std_logic_unsigned
- 一组符号arithemtic、转换,并比较STD_LOGIC_VECTOR功能的程序包。-A set of unsigned arithemtic, conversion, and comparision functions for STD_LOGIC_VECTOR.
FPGAfuture
- 机遇与挑战并存Xilinx谈FPGA未来的发展方向及趋势-Opportunities and challenges Xilinx FPGA on the future direction and trends
FPGAmarket
- 消费类产品是未来PLD_FPGA市场的增长点，讲述FPGA的市场前景-Opportunities and challenges Xilinx FPGA on the future direction and trends
ModelSim
- verilog Source code for DCT
chap3
- verilog, please download and excise-verilog,please download and excise
MCPUDESIGN
- This file is fof single Process Unit design for new pepole -This file is fof single Process Unit design for new pepole
SPI_Bridge_Design_Example
- 基于ALTERA的nios2的SPI通信，文档包含整个工程，包括主从模式，很有参考价值。-Based on ALTERA' s nios2 the SPI communication, the document contains the entire project, including master-slave mode, a good reference.
fft_st
- 用NIOS2核建的FFT工程，能够对输入的数据进行FFT或IFFT变换。-FFT with NIOS2 nuclear construction projects, to input data on FFT or IFFT transform.
QAM16_Demapping
- 用VERILOG写的解16qam程序。本来是针对OFDM设计的，有一定参考价值。-Solutions 16qam with VERILOG written procedures. Was originally designed for OFDM has some reference value.
SD
- SD datasheet basic mini sdhc
fpga_usb_serial_20091006.tar
- 免费的usb2.0源码,支持Xilinx和Alteral的FPGA-USB2.0 free sources