资源列表
DDR2_controller
- DDR2控制器IP的设计与FPGA实现，使用verilog语言-DDR2 Controller IP Design and FPGA implementation, use the verilog language
VHDL_learning
- VHDL学习资料，适合入门者快速提高，包括VHDL基本语句讲解，VHDL编程黄金宝典和100个VHDL设计范例。-VHDL learning materials, suitable for beginners to quickly improve, including statements to explain the basic VHDL, VHDL programming, and 100 Gold Collection VHDL design examples.
Synplify_Pro_FPGA
- 基于 Synplify /Synplify Pro 的 FPGA 高级综合设计-Based Synplify/Synplify Pro advanced FPGA synthesis design of
Verilog
- Verilog数字系统设计教程夏宇闻例题源文件-Verilog Digital System Design Education Chengxia Yu Wen example source file
HDLSample
- FPGA的周边电路的设计源码用HDL语言编写-Peripheral circuit design FPGA using HDL language source
CDPlayersources
- 全套日本CD Player的FPGA设计制作源码，用VHDL编写，具有很好的参考价值。-Japanese CD Player complete set of FPGA design source code, written using VHDL with a good reference value.
MAXII_DWM_200803
- 模拟摄像机信号输入的全套FPGA设计电路，具有非常好的参考价值。-Analog camera signal input of the full FPGA design circuits, has a very good reference value.
FPGA
- fpga从零开始，很经典的范例，通过FPGA实现一些基本功能！-fpga from scratch, it is the classic example, through the FPGA to achieve some of the basic functions!
iso_rfid_send
- 15693协议的发送模块，能够完成数据的发送，并且在特定的情况下发送错误指令，功能单一，可以完成16位数据的发送。-15693 protocol to send the module, to complete the data transmission, and in certain circumstances to send error commands, single function, you can complete the 16-bit data transmission.
fifo
- 在fpga中实现fifo，配合数码管显示，仅供学习参考-Realized in fpga fifo, with digital display, study and reference purposes only
liushuimux
- 为了提高频率，fpga中常常用到流水线等技巧，本代码实现了流水线模式的乘法操作-In order to improve the frequency, fpga often used in assembly line and other techniques, the code implements the multiplication pipeline mode
FFT.vhdl
- FFT algorithm to implement FFT chip.