资源列表
spi
- 基于CPLD的用SPI控制pwm的源码，用VHDL编写，已经测试，可以直接使用
VGA_COLOUR
- vga CONTROL ip核，请大家下载试用-vga CONTROL ip nuclear
sc_examples.tar
- some examples of SystemC to begin SoC modeling -some examples of SystemC to begin SoC modeling
data_rom
- 正弦波信号发生器 正弦波信号发生器 -sine wave signal generator sine wave signal generator
max
- 这是一个在MAX+plus上面的计数器仿真图，基于FPGA的仿真。-This is a counter above the MAX+ plus simulation map, FPGA-based simulation.
MEdia_control_i2c
- 将来自MAC的GMII8B码进行8B/10B编码。FPGA输出10路10B码的数据，如有必要，可配置*SDRAM，FPGA还得实现SDRAM控制器，-Will come from the MAC' s GMII8B codes 8B/10B encoding. FPGA output 10 Road 10B code data, if necessary, can be configured to plug SDRAM, FPGA have to realize SDRAM contro
tristtes_test
- 三态门是FPGA 编程开发中经常遇到的一个问题,我们设计了一种正确的仿真方法，希望对大家有所帮助-Three-state gate FPGA Programming is often encountered a problem, we design a proper simulation method, we want to help
FrequencyMeasureV1.0
- Verilog写的相检宽带测频的IP及文档。-Verilog of frequency measurement
hongwai
- 发射电路是以555为核心组成多谐振荡器，通过改变振荡器的工作频率来调节红外发射器件的工作频率，且可以通过调节电阻来减小红外信号的占空比，从而尽可能地增加红外防护的范围。-Transmitter is composed of 555 core multivibrator, by changing the oscillator frequency to adjust the frequency of infrared emitter, and can adjust the resistance to
maichongbbbb
- 学习利用集成逻辑门、555定时器设计脉冲信号产生电路；掌握影响脉冲波形参数的定时元件参数的计算方法；学习脉冲波形整形和分频方法 -Learning to use the integrated logic gate, 555 timer pulse signal generation circuit design control parameters affect the timing pulse device parameters is calculated study pulse sh
mmpp33
- 本电子钟由AT89C52单片机、555电路、报警电路，流水灯，校正时间电路、显示电路组成。-The electronic bell AT89C52 microcontroller, 555 circuits, alarm circuits, water lamp, the time correction circuit, display circuit.
key44
- VHDL写的4*4薄膜键盘，设计分频和扫描-VHDL was 4* 4 membrane keyboard, design and scanning frequency