资源列表
RS_255_223_ENCODER
- RS(255,223)编码器程序 从一本书上看到的，很不错的-RS(255,223) encode , very good good good
RS-5-3-CODE
- RS(5,3）编码器原程序 程序已经调试过 且比较简短-RS(5,3） coder ,this code is very short
testbench
- 介绍了fpga设计中，利用testbench设计源码测试激励文件，很方便很详细-Introduced fpga design, test stimulus using testbench design source files, it is more convenient
divider
- 介绍了verilog设计中一种分频器的写法，很通用实惠，方便移植-Introduced the verilog design the wording of a kind of divider, a very common benefit, to facilitate migration
fpga
- FPGA设计相关经验，主要介绍了一下同步设计中的相关设计概念以及相关设计规则-FPGA design-related experience, introduces a bit synchronous design and related design concepts related to design rules
AD0819
- 利用verilog语言实现对AD0819的模数转换控制，源代码工程文件-Verilog language used on the AD0819' s ADC control, source code project files
code
- GPS系统C_A码跟踪环的研究及FPGA实现 一篇很有价值的学术文献-GPS systems C_A code tracking loop and FPGA Implementation of a valuable academic literature
AlteraFPGA_CPLD
- fpga开发学习工具书，分入门篇和高级篇-fpga learning tool development, sub-chapter started and advanced articles
sigcpld
- 用51单片机控制ARIC429的地址计算的CPLD代码，CPLD为XC95108-MCU with 51 address ARIC429 calculated CPLD code, CPLD to XC95108
13.6
- tlc549 VHDL 电压表 FPGA 数模转换-tlc549 VHDL FPGA DAC voltage meter
adc0809
- VHDL FPGA ADC0809 数模转换 状态机-VHDL FPGA ADC0809 DAC state machine
1212
- VERILOG+HDL硬件描述语言实现电话计费系统，实践代码。-VERILOG+ HDL hardware descr iption language telephone billing system, practice code.