资源列表
code_huffman
- this code implements huffman coding on Xilinx FPGA.the code is designed for Xilinx SDK
xapp753
- FPGA Interface to the TMSC6000 DSP Platform Using EMIF
EDAshuzishizhong
- 多功能数字时钟课程设计可用的,含手动校时电路，整点报时电路。报时长短需要自己设置程序-digital clock decode
caiyang
- 采样计数程序，用于测量外加脉冲-Sample count procedures for measuring external pulse
counter
- 基础的计数器，对于新手来说也许会用的着。可作为基本子程序使用-Based counter, for the novice may use the. Can be used as a basic subroutine
MultiCLKCPU
- 本设计实现了多周期CPU的设计，运行环境是quatrus2；该多周期CPU可以处理22条32位指令（具体指令见源码，绝不坑人）。压缩包内含有源代码，程序模块表和实验报告以及详细的设计图，是学习verilog的好材料啊。-The Design and Implementation of a multi-cycle CPU design, operating environment is quatrus2 the multi-cycle CPU can handle 22 32 instructi
try04
- ＸＩＬＩＮＸ公司的ＥＤＫ程序，用于练习连接各输入输出管脚配置-XILINX EDK company procedures for the practice to connect the input and output pin configuration
VHDL
- VHDL语言及其应用 哈尔滨工程大学信息与通信工程学院-VHDL language and the application of Harbin Engineering University, Institute of Information and Communication Engineering
zonghe5
- 闹钟、电子钟典型实例，具有校时，整点报时等功能-Alarm clock, electronic clock typical example, a school, the whole point of time and other functions
taxi
- 基于VHDL出租车计价器的设计，能实现出租车载客过程的计费作用。-VHDL-based design of a taxi meter, taxi passengers can realize the process of charging effect.
EDAtaxi
- 实现出租车的计价功能，并且能手动来操作！-Valuation function to achieve a taxi, and can manually operate!
taxione
- 基于VHDL出租车的设计，实现开动、停止的收费功能。-VHDL-based cab design, implementation and running, stop the charging function.