资源列表
sin_10k
- 基于FPGA的利用rom进行查询的方式生成一个频率为10KHZ的sin信号，编译成功，并实现功能仿真。-Query based on the the FPGA use of rom generate a frequency of 10 kHz sin signal, compiled successfully and to achieve functional simulation.
VHDL_uart
- 用xilinx的FPGA-spartan3E实现uart，固定波特率9600，偶校验，系统时钟50MHz，能够实现将从串口调试助手发送到FPGA的数据重新发回串口调试助手-using xilinx s FPGA-spartan3E to implement uart with a baudrate of 9600, even parity check. The system frequency is 50MHz.It can turn the data from serial assistant
DCtroller
- FPGA分组式直流固态功率控制器的设计DC FPGA block design of solid-state power controller-DC FPGA block design of solid-state power controller
adder_4bits_jer
- Verilog Adder4bits for education
S3Demo
- Spartan 3 Digilent Demo:This demo drives the perphrials on the Spartan 3 board. This drives a simple pattern to the VGA port, connects the switches to the LEDs, buttons to each anode of the seven segment decoder. The seven segment decoder has a simpl
new_i2c
- 用FPGA做的一个I2C接口程序......可以用于I2C通信-FPGA to do with a I2C interface program can be used for I2C communication .... ......
DE2_115_TV
- 用FPGA开发板实现FPGA接受TV视频信号，然后显示在显示器上-FPGA development board FPGA accept TV video signal, and then displayed on the monitor
elevator
- 用VHDL编写的一个电梯控制程序，花了很长时间，应该很不错的-VHDL prepared with a elevator control procedures, took a long time, should be very good
Modelsim_How_to_use_pdf
- Modelsim的使用方法，适合新手学习，有详细的操作方法和例程-Modelsim to use, suitable for beginners to learn, detailed operating methods and routines
learn_dds.基于quartus ii 9.0的简易dds波形发生器
- 基于quartus ii 9.0的简易dds波形发生器，可以产生正弦，方波，三角波，可变幅，可变频。非常适合学习使用，使用时请按自己的芯片和引脚设置,Quartus ii 9.0 Based on dds simple waveform generator can produce sine, square, triangle wave can be amplitude, frequency can be. Very suitable for learning to use, when used
Lab3B
- A Sequential Divider Design in VHDL -- homework in ASIC & FPGA Design cla-A Sequential Divider Design in VHDL-- homework in ASIC & FPGA Design class
VHDL-multi-function-clock
- 多功能时钟,包括一个时钟和一个秒表,可以互相切换并且不过中断各自的运行-a multi-function clock