资源列表
SIPO
- this code is designed to perform serial to parallel it is essential to every design
OFDM
- this code is for orthogonal frequency devision multiplexing and it is essential for the communication blocks-this code is for orthogonal frequency devision multiplexing and it is essential for the communication blocks
RAM
- this code is for the ram blocks and it is very essential if you are going to implement asic
BCD
- BCD\七段显示译码器 数码管段显示发光二级管是共阴连结，所以显示高电平有效，即哪一段的驱动信号为高电平，则对应段发亮-BCD \ seven-segment display decoder digital tube sections show light-emitting diode is a link to a total of yin, it showed high and effective, that is what section of the drive signal is h
EDAVHDL
- VHDL硬件描述语言 MAX+PLUSⅡ介绍 CPLD数字发展实验系统简介以及十个数字电路和数字系统实验的源代码和介绍-VHDL hardware descr iption language introduced the MAX+ PLUS Ⅱ Introduction CPLD digital development of experimental systems, as well as 10 digital circuits and digital systems, the source c
RAM_DDS
- 使用硬件描述语言，在FPGA中实现直接数字频率合成-Use of hardware descr iption language, in the FPGA to implement direct digital frequency synthesis
ROM
- ROM在FPGA内的实现方法，简单的例程-ROM
ALU.vhd
- Desarrollo de la Unidad Légica Aritmética (ALU) en VHDL
eda
- 有关vhdl语言的例子，很简单，不过看完后会收获很大-Examples of the vhdl language is very simple, but after reading a great harvest
square_root
- /* root_x is an 8 bit number with four bits in front of the binary point and four bits behind, increment is an 11 bit number with 3 bits in front of the binary point and 8 bits behind the binary point. In order increase resolution and preve
DigitalSystemsDesignUsingVHDL
- book on vhdl with lot of good examples