资源列表
Lab4b_24897141
- this is vhdl behavorial model of a dct chip at an algorithmic level
GPS
- 详细研究了GPS信号捕获跟踪技术，并进行了FPGA设计.是学习GPS系统很好的资料。 -A detailed study of the GPS signal acquisition and tracking technology, and conducted a FPGA design. Is to learn from a very good GPS system information.
vhdl
- vhdl 语言的教学视频 很好的教学视频 适合初学者使用-vhdl language teaching video A good teaching video for beginners
uart_tx
- UART EDGE TRIGGERED ONE SHOT VHDL
pwm_50hz
- fpga控制舵机s3010旋转，VHDL编写,通过按钮控制-fpga control of steering rotation, VHDL preparation
addersubtractor9
- vhdl code for adder 8bit
dctalgo
- vhdl coding for dct algorithm
addersubtractor10
- vhdl coding for adder subtractor used in dct
signaddsub12
- vhdl coding for signed adder substractor
vhl_application
- VHDL source code for a controller application
ddr_sdr_latest.tar
- 一款DDR400的驱动程序，使用VERILOG语言，在LATTICE—ECP2m的FPGA芯片中实际测试。-A DDR400 driver, using VERILOG language, LATTICE-ECP2m actual test of the FPGA chip.
vga_lcd_latest.tar
- 此VGA/LCD控制器是revB.3版本的基于WISHBONE总线，适用于驱动CRT和LCD显示屏的嵌入式VGA驱动。-VGA/LCD Controller core is a WISHBONE revB.3 compliant embedded VGA core capable of driving CRT and LCD displays. It supports user programmable resolutions and video timings, which are limit