资源列表
frequency_divider
- 分频器的编程思路为：32MHZ经过第1次分频变成1KHZ，再经过第2次分频变成100HZ，分别输出两次分频结果。-Divider of programming ideas for: 32MHZ after the first band to become a sub-sub-1KHZ, and then after the 2nd sub-band into a 100HZ, respectively, the results of the output frequency of the two
counter
- 计数器整体的功能为完成计数定时（00：00—59:59:99），要完成1个小时的计数范围-The overall function of the counter from time to time for the completion of counting (00:00-59:59:99), to complete the count range of 1 hour
scanner
- 扫描显示译码控制部分用一个频率1KHz的信号扫描一个多路选择器，实现对六位已经锁存的计数结果的扫描输出-Scan revealed a decoding control part of the signal with a frequency of 1KHz scan more than one MUX to achieve a count of six has been the results of the scan latch output
led
- 源码是控制一排led灯闪烁，源码已经调通。-Source code is to control a row of led lights flashing, source code has been transferred pass.
i2cmmm
- i2c 可以直接进行综合-i2c rrrrrrrrrrrrrrrrrrrr
VHDL_uart
- this a code fr performing arithmetic and logic functions
Frequency_Characteristic_Tester
- 利用FPGA，通过verilog语言编程，实现对外围网络的频率特性测试(仅供参考，有些依赖于外围硬件)-The use of FPGA, through the verilog language programming, the frequency characteristics of the perimeter network testing (for reference only, and some rely on external hardware)
I2Ccore
- 基于I2C实现的摄像头驱动程序-基于I2C实现的摄像头驱动程序，，，，，，，，
61EDA_H173
- Verilog设计的求复角的源代码(通过仿真验证的)-Verilog design of seeking re-angle the source code (through the simulation of the)
VHDL100example
- 用来学习VHDL的很好的资料，讲解很通俗，而且有源码，都是一些最经典的案例！-VHDL is used to learn good information, to explain a very popular, but also source code, are some of the most classic case!
Dianzi_Clock
- 基于xilinx的spartan3a平台的电子时钟实现-Based on xilinx s spartan3a platform electronic clock to implement
VHDL_book
- 详细介绍VHDL编程的基础知识，包括定义、结构要点、设计单元、操作符、数据类型、控制语句等等。适用于初学者入门。-Detailed VHDL programming basics, including definitions, structural elements, design elements, operators, data types, control statements and so on. Apply to beginners started.