资源列表
CycloneIII_EP3C40F780C8_27_DC_Motor
- SOPC,CycloneIII系列芯片EP3C40F780C8，NIOS II IDE,直流电动机控制实验代码 -SOPC,CycloneIII，EP3C40F780C8，NIOS II IDE, DC monitor code
CycloneIII_EP3C40F780C8_26_DDRII
- SOPC,CycloneIII系列芯片EP3C40F780C8，NIOS II IDE,DDR II测试实验代码-SOPC,CycloneIII，EP3C40F780C8，NIOS II IDE, DDR II code
led-water
- 流水灯程序，时钟频率为50MHz，控制四个led向同一个方向移动，如流水一样。没建个0.5s点亮一个灯，使灯亮朝一个方向移动-Water lights, clock frequency of 50MHz, control four led moving in the same direction, like water, like. Did not build a 0.5s lit a lamp, the lamp lights move in one direction
hvdl
- 实现60秒秒表功能，代码简单，可扩展，可操作，已在FPGA开发板上实现-Achieve 60 seconds stopwatch function, the code is simple, scalable, operable in FPGA development board to achieve
I2c-design-basedNios-II-
- 基于FPGA的NIos II嵌入式系统通过I2C总线协议对串行电可擦写可编程只读存储器（AT24C02）进行读写操作，通过串口调试工具查看数据的传输是否正确。-NIos II FPGA-based embedded systems through the I2C bus protocol on the serial electrically EPROM (AT24C02) read and write operations, through the serial port debugging t
USB2.0IPcoredesign
- USB2.0的IP核开发.代码可以直接使用已经验证过。-USB2.0 IP core development. Code can be directly used has already been verified.
DMA_UART-SDRAM
- 以DMA传输方式接收外部串口设备发送的数据并保存到SDRAM存储器中，通过使用串口调试工具来查看数据传输是否正确。-DMA transfer to an external serial device to receive data sent and saved to SDRAM memory, by using the serial port debugging tool to view data transmission is correct.
II2C1
- 基于FPGA的II2的存储工程，由于FPGA不能实现存储程序或者数据，所以要外接存储芯片，由于II2c具有方便的存储和调用，所以这种存储方式比较方便。-FPGA-based II2 storage project can not be realized due FPGA program or data memory, so an external memory chips, because II2c has a convenient storage and recall, so this sto
Adder12_3-4
- This is an 12 bits adder in Verilog. it adds three 4 bit nibbles in parallel.
Adder12_4-3
- This an 12 bits adder in Verilog. it adds four 3 bit nibbles in parallel.-This is an 12 bits adder in Verilog. it adds four 3 bit nibbles in parallel.
Stepper-motor-positioning
- 使用VHDL语言，编写的步进电机定位控制系统，-Using VHDL language, written in stepper motor positioning control system,
Multiplier4b
- This a code of a multiplier for two 4 bits numbers written in Verilog.-This is a code of a multiplier for two 4 bits numbers written in Verilog.