资源列表
ADD_Float_IEEE754
- IEEE754 floating point adder
hdlc_rs
- 一种带有CRC校验、一次可连续发送1－15块16字节数据、带有曼彻斯特码的hdlc收发程序，在Altera中仿真并在实际芯片中试验过的程序-One kind with a CRC check, send a continuous block of 16 bytes of data 1-15, with Manchester' s hdlc receive procedures in the Altera chip simulation and tested in the actual pr
xiyiji
- 洗衣机控制程序，包括分频器，计数器，触发控制器等。-Washing machine control procedures, including the divider, counter, trigger controller.
ddsphase
- 低频数字相位测量仪仿真的软件部分，是由VHDL语言设计-Low-frequency digital phase-measuring instrument simulation software is designed by VHDL language
CordicverilgHDL
- 实现cordic算法，输入数据为16位，为提高精度，输出为20位。-achieve cordic algorithm, the input data for the 16, to increase accuracy and output 20.
付铁刚036089095
- vhdl寄存/计数器设计-VHDL Storage / counter design
VHDL-status
- VHDL状态机学习笔记,对初学者有很重要的帮助意义-VHDL state machine learning notes for beginners has a very important significance help
vhdlkechengsheji
- 输入正确密码显示绿灯亮 错误时红灯亮并发出警报 运行环境为matplaux 2-a afdg jhg dfgh r fbnrfer
VGA
- VGA屏幕显示，verilog语言，分模块文件rtl_test_vga_grid，vga_grid，vga_signal，vga_sync，希望对您有用。-VGA，verilog language，module are rtl_test_vga_grid，vga_grid，vga_signal，vga_sync，i help it s useful to you .
IOLED
- 基于单片机显示原理的IO和LED显示原理-Based on the principle of IO chip and LED display shows the principle
motorcontrol(vhdl).rar
- 基于FPGA的直电机伺服系统的设计的代码，VHDL语言。包括前馈控制，AD1674控制模块，ADC0809控制模块，前馈控制模块，分频模块等。,FPGA-based servo system direct the design of the electrical code, VHDL language. Including feed-forward control, AD1674 control module, ADC0809 control module, feed-forward contr
lab5_VHDL
- VHDL数字系统设计和工程实践3，包含原理，真值表和原理图，以及VHDL源代码.-VHDL digital system design and engineering practice, 3, including the principles, truth table and schematic, as well as VHDL source code.