资源列表
ECC校验FPGA源码
- ECC校验FPGA源码，VHDL编写
clock
- vhdl spartan3e clock
CPLDCARLIGHTSCONTROL
- 本课程设计根据计算机中状态机原理，采用CPLD技术设计了简易的汽车尾灯控制器。-This course is designed based on a computer, the state machine is designed cpld technology of the taillights controller.
Ep2c5q208
- 关于FPGA(EP2c5q208)的原理图-On the FPGA (EP2c5q208) schematic
rtl
- this the generation of 48 pulses implementation in hdl language-this is the generation of 48 pulses implementation in hdl language
FILTER_FIR
- this is code for fir filter.
vhdl2
- 在QuartusII下进行编译和仿真的时候,会出现一堆warning,有的可以忽略,有的却需要注意-QuartusII warning solving
RISC_CPU
- VHDL语言设计的RISC_CPU，分为八个基本部件分模块构建，分别为时钟发生器，指令寄存器，累加器，算术逻辑运算单元，数据控制器，状态控制器，程序计数器以及地址多路器-The VHDL language RISC_CPU, is divided into eight basic components of modular construction, respectively, the clock generator, the instruction register, accumulator,
VHDL_clock.rar
- 用VHDL写的数字电子钟的实例，采用的是altera的FPGA芯片,VHDL examples of digital electronic clock
Desktop
- verilog code for clock
qam
- quadrature amplitude demodulator
shuzipinlvji
- 四位十进制数码显示、量程自动转换的数字频率计。-four decimal digital display, automatic conversion range of frequency meter.