资源列表
Full_adder
- 全加器的VHDL逻辑编程，外加两个全功能，这个过程有些简单，但可能有一些初学者的帮助。-Full adder VHDL logic programming, plus two full-function, this process some simple, but there may be some beginners help.
div
- 近期的一些VHDL语言练习实例，包括一些简单的逻辑电路设计，运行大部分成功，可能还有一些小问题，希望各位同仁指点改正。-Some recent examples of VHDL language exercises, including some simple logic circuit design, running most of the successful, there may be some small problems, hope that colleagues pointing c
61EDA_C2686
- 基于Nios平台的光信号采集片上系统设计 -Nios platform based on optical signal acquisition system on a chip design
BS
- 用EDA设计ROM和RAM及其应用，用VHDL语言编程实现字符、汉字的存取并用点阵显示-ROM and RAM design with the EDA and its applications, using VHDL programming language characters, Chinese characters, access to and use dot-matrix display
cordic_parameteizaed
- Verilog实现三角函数（基于CORDIC算法）-Verilog realization of trigonometric functions
adc_spi
- dsp通过SPI接口数据采集 sigma-delta ADC采集程序-dsp through the SPI interface, data acquisition sigma-delta ADC acquisition program
LCD
- 這是一個DE2的LCD模組顯示程序包含計時和99成法表的功能，保證可動-This is a DE2s LCD display program that contains timing and function of the table 99 into law to ensure that moving
ondoscope
- avr示波器全套资料，包括原理图 datasheet和程序代码！ -avr oscilloscope complete information, including schematics datasheet and programming code!
FSK
- 基于FPGA的FSK的调制解调程序 VHDL-FPGA-based FSK modulation and demodulation process of VHDL
CPLD(ZFZ2009-2-24)
- 转速表CPLD源程序代码,具有频率检测,数码管显示刷新，反转检测功能-Tachometer CPLD source code, with a frequency detection, digital tube display refresh, reversal detection
minimips_ml1059_synth
- MiniMIps design - Contains verilog/vhdl code and relevant FPGA files
fsk
- vhddl implementation of frequency shift keying