资源列表
Verilog_VHDL
- Verilog——解决初学者疑惑：VHDL、Verilog，System+verilog比较.pdf-Comparison of VHDL, Verilog and SystemVerilog
sineWave
- 在FPGA上产生正弦波输出， VHDL语言-In the FPGA to generate sine wave output, VHDL language
vhdl
- vhdl 常见电路设计代码，组合逻辑，时序电路设计，状态机设计 -vhdl
CPU_Core
- 这个是8051的内核，十分具有参考价值，可以直接使用-This is the 8051 core, a very useful reference can be used directly
cml
- 基于Verilog的数字基带通信系统 3. 项目描述：本系统为通信原理课程设计课题之一，用Verilog语言编写数字基带通信系统的应用程序，完成P=31的m序列的生成，并进行HDB3编码传输，在接收端进行译码接收。-Verilog-based digital baseband communication system 3. Project Descr iption: The system is one of the topics Communication Theory course des
51-DDS
- 不仅包含FPGA源码还包含51单片机控制源码，已经实现DDS功能，绝对原创。-Includes not only the FPGA source code also includes a 51 SCM control source, has been achieved DDS functions, absolutely original.
vhdl
- vhdl半加半减及全加器的实现即功能具体代码的编写-vhdl half-Canadian half-and full-adder function of the realization that the preparation of a specific code
8bitprocessor
- 用简单函数实现八位处理器的fpga程序 用vhdl语言编写 quartus环境实现-With the function to achieve eight-processor fpga program
HelloLED
- nios下实现helloled灯点亮 用vhdl语言编写 quartus环境实现-nios achieve helloled lamp lit environment with the vhdl language quartus to achieve
charLCD
- 字符lcd程序 vhdl语言 quartus环境下实现-Character lcd program vhdl language quartus environment to achieve
ECE200_LAB4
- Control unit for DLX processor
mfccmain
- It s about speech recognition to extract the features.