资源列表
sdr_verilog
- 用Verilog实现SDR_SDRAM的控制器,可用FPGA实现对普通SDRAM的读写操作!-SDR_SDRAM using Verilog implementation of the controller, the FPGA can be used to achieve the ordinary SDRAM read and write operations!
encoder8_3
- 用VERILOG语言实现了常用8_3编码器.-Verilog language used to achieve a common decoder 3-8.-With the VERILOG language to implement common 8_3 encoder .- Verilog language used to achieve a common decoder 3-8.
PS2
- CPLD 上实现 PS2键盘协议，可以读取PS2键盘，然后用串口发送，CPLD为Altera的EPM240-CPLD to achieve PS2 keyboard protocol, you can read the PS2 keyboard, serial port and then send, CPLD for Altera' s EPM240
lcd
- lcd display on xilinx spartan 3e
clockbuffer
- clock buffer for xilinx spartan 3e
topsequence
- modeling of fsm in vhdl
processor
- verilog program for alu
singlecycleMIPS-lite
- mips processor——32bit-mips processor- 32bit
vhdl
- 基于FPGA的I2C总线模拟，采用verilog HDL语言编写-I2C-bus FPGA-based simulation using verilog HDL language
VerilogHDL
- Vhdl langerang is akiund tool of EDA-Vhdl langerang is akiund tool of EDA
Barrel_shifter
- verilog语言的桶形移位器，实验课上做的，大家别见笑-Barrel shifter
CPU
- verilog实现的一个简单的CPU，大家可下载去瞅瞅啊-verilog to achieve a simple CPU, you can download to Chou Chou ah