资源列表
LCD1602_cpld_max_vhdl
- LCD1602 完整的MAX2 CPLD VHDL 代码，可以直接使用的-LCD1602 MAX2 CPLD VHDL
1-fpga-led
- 利用veriog语言编程，实现fpga板控制led灯点亮-Use veriog language programming, fpga board control led lights
fpga-uart
- 利用fpga实现串口通信实验，文件包含其实现语言-Use fpga serial communication experiment, the file contains its implementation language
fpga-uart-led
- 利用fpga实现串口通信，并通过通信实现led的点亮-Fpga implementation using the serial communication, and through communication to achieve the led lights
fpga_test_DA_AD
- 用于全国大学生电子设计大赛，一个基于FPGA平台的DA_AD程序。-For National Undergraduate Electronic Design Contest, an FPGA-based platform DA_AD program.
UART_test
- 用于全国大学生电子设计大赛，一个基于FPGA的串口测试程序-For National Undergraduate Electronic Design Contest, an FPGA-based serial testing procedures
AD_LCD
- 用于全国大学生电子设计大赛，一个基于c8051f120的ad测频率并显示在lcd上的程序-For National Undergraduate Electronic Design Contest, a measure based on the frequency of the ad c8051f120 and displayed on the lcd procedure
decode
- 使用FSM控制，完成32位数据的decode，对DATA_PATH进行监测，Load Return addr from Stack into PC-Using FSM control, complete 32-bit data decode, for DATA_PATH monitoring, Load Return addr from Stack into PC
stoto
- 通过选通可以分别实现四个5位数据的简单逻辑运算和数学运算-Gating can be achieved through four five data were simple logic operations and math
bhsvhdl
- I uploaded vhdl progrgrams on AND gate, JK flip flop,OR gate, Xor gate
eth
- 用数字逻辑语言描述以太网，百兆以太网MAC和MII的verilog源码-With digital logic language to describe Ethernet
LED_Test
- 利用VerilogHDL在quartus ii下编写的简易流水灯实验，采用的是顺序执行的方式！-Use in quartus ii VerilogHDL summary prepared under light water experiment, using sequential way!