资源列表
URAT_VHDL
- FPGA采用模块工程文件QUARTUS II工程、ADC0809、电机控制PWM、LCD12864显示控制、UART_VHDL-FPGA module QUARTUS II project engineering documents, ADC0809, motor control PWM, LCD12864 display control, UART_VHDL
FPGA_LCD12864_VHDL_EP2C5T144C8
- fpga 控制LCD12864显示控制、VHDL语言编写，并且在EP2C5T144C8上运行通过！-fpga control LCD12864 display control, VHDL language, and run through EP2C5T144C8!
ADC0809_VHDL_QUAARTUSII_PROJECT
- FPGA模块工程、ADC0809状态机控制ADC0809_VHDL_QUAARTUSII_PROJECT可以直接使用！-FPGA module works, ADC0809 control state machine can be used directly ADC0809_VHDL_QUAARTUSII_PROJECT!
unit3
- Part 3 - Verilog Documents-Part 3- Verilog Documents
ESIMERKKISOVELLUS_V13
- Actel Fusion System Management Kit Libero Design for using I2C
chuzuchejijiaqi
- 出租车计价器，按键切换显示金额，里程和车速-Taximeter, key switch shows the amount of mileage and speed
dds
- 做的一个DDS,用quartus仿真成功-Do a DDS, a successful simulation with quartus
FPGA
- 描述了利用FPGA和51单片机实现等精度频率计，这个只包含FPGA部分的源程序-Describes the use of FPGA and MCU 51, such as precision frequency meter, the FPGA contains only part of the source
final_designed
- 利用AVR单片机和FPGA的DDS实现的信号发生器-The use of AVR MCU and FPGA realization of the DDS signal generator
traffic
- verilog编写的一个交通灯程序，利用状态机实现。压缩包内有说明文档，源代码及时序截图-verilog prepared a program of traffic lights, the use of state machine to achieve. Compressed packet, there are documentation, source code and timing Screenshots
shuma0-3
- 利用verilog语言编程 以FPGA为开发工具实现数码管0-3显示！-Verilog language programming to the use of FPGA development tools for the realization of digital tube 0-3 show!
ADC
- ADC instruction for HC08 Target