资源列表
clk_gen
- 基于vhdl的分频器模块设计，已经经过调试，可直接调用-Divider vhdl module based on the design, debugging has been directly call
frecount
- 基于vhdl的频率计控制器模块设计，已经经过调试，可直接调用-Vhdl based on the frequency of the controller module design, debugging has been directly call
choosebcd
- 基于vhdl的BCD码转ASCII码的设计，已经经过调试，可直接使用-Vhdl code based on the BCD to ASCII code of the design, debugging has been directly used
keyboard
- fpga与4*8键盘和数码管结合的测试程序-fpga and 4* 8 keyboard and digital test procedures associated
080637
- 基于FPGA的VGA显示控制器的实现 VGA作为一种标准的显示接口得到广泛的应用。本论文依据VGA接口设计原理，采用VHDL语言以及Altera 公司的Cyclone系列FPGA进行VGA显示控制器的设计，最后给出了Ouartus II的仿真结果。-As a standard display interface，VGA has been widely used．According to the designing principle ofVGA interface， Use VttD
vhdl_jifenping
- 内包含奇数分频代码,写的简单,很容易懂, 希望对大家有帮助-Containing odd-numbered sub-frequency code, written in simple and very easy to understand, I hope all of you help
serial
- 该程序用vhdl 编写，模拟串口工作，对上位机发送数据在串口调试工具下显示，接受上位机数据在数码管上显示-Vhdl prepared to use the program to simulate the serial port work, send data to the PC serial port debug tools in the next showed that IPC data in digital tube display
dds
- 用VERILOG语言实现的dds(直接数字频率合成器)-VERILOG language with the dds (DDS)
fft
- 用VERILOG语言实现的频谱分析仪（FFT)-VERILOG language with the Spectrum Analyzer (FFT)
tlc5620dac
- 用VERILOG语言写的控制DAC TLC5620的程序-VERILOG language used to control the DAC TLC5620 procedures
xor
- 异或门的FPGA实现的verilog代码-xor FPGA realization of the verilog code
TLC5510
- 基于FPGA的TLC5510控制器的设计VHDL源码-FPGA-based controller design TLC5510 the VHDL source code