资源列表
2-QUARTUSII
- 让大家更加的了解EDA技术在日常生活中的重要性。-Let us be more understanding of EDA technology in daily life importance.
sin125
- 用FPGA实现DDS的信号发生器（正弦波125kHz）-Using FPGA to achieve DDS signal generator (sine wave 125kHz)
serial
- 基于VHDL的串口通信 基于VHDL的串口通信-VHDL-based serial communication based on VHDL Serial Communication
USB11Core
- FPGA设计的USB1.1IP Core，说明文档也在里面了-FPGA design USB1.1IP Core, documentation is also inside the
VerilogHDL
- 基于VerilogHDL的实用教程，书中介绍得简单易懂-Based on VerilogHDL Practical Guide, a book to introduce easy-to-read
11
- VHDL语法的支持范围是不一样的，以下程序中的某些语句可能不能运行在所有的软件平台之上，因此程序可能要作一些修改，同时务必注意阅读程序中的注释。以下部分程序为txt格式，请自行另存为vdh后缀的文件。有些EDA软件要求ENTITY的名称和文件名要相同，也请自行修改。 如发现错误请来信指正或在BBS上提出。 -VHDL syntax support is not the same as the scope, the following procedures for some of the st
22
- VHDL语言实现三人表决器控制电路，有优先级自主设定等功能-VHDL language to achieve three of the voting machine control circuit, a priority setting features such as autonomous
Modelsim
- modelsim 的使用具体方法与步骤 以及与Quartus联合仿真-ModelSim the use of specific methods and procedures, as well as a joint simulation with the Quartus
modelsimshiyong
- modelsim的详细开发和使用过程 适合初级modelsim学员-ModelSim detailed process of development and use of ModelSim for primary students
yueqvyanzou
- 基于MUXPLUS2的VHDL程序，实现音乐播放，-MUXPLUS2 the VHDL-based procedures, the realization of music player,
AS_FIFO_DESIGN_Verilog
- 使用Verilog硬件描述语言完成了一个异步FIFO的设计，供相关硬件开发人员参考。-Verilog hardware descr iption language used to complete an asynchronous FIFO design, hardware development for the relevant reference.
vhdl
- 着个是一个8051的完整源代码，用VHDL书写。需要的可以看看，很有好处-8051 a month is a complete source code, written using VHDL. Needs can see, it is beneficial to