资源列表
adder_csa
- carry select adder in verilog
RAMANDVHDL
- 双接口的RAM的VHDL，用VHDL语言编写的
aes_fsl_interface
- aes to fsl with xilinx fpga
pwm
- 一个用AVALON总线控制的PWM模块，可以结合SOPC中的定制模块来使用，经过测试使用正确-With the AVALON bus control of a PWM module can be combined with SOPC custom module has been tested using the correct
erjielvbq
- 使用verilog语言描述的二阶巴特沃斯IIR滤波器，程序中有参数说明，已经运行通过-Using verilog language to describe the second-order Butterworth IIR filter, the program has parameter descr iption has been run through
PWMhuxideng
- VHDL语言编写的三总不同频率呼吸灯。使用PWM波控制呼吸频率。-VHDL language three total breathing light at different frequencies. Use PWM wave control breathing frequency.
vga_dis
- VGA显示，用verilog实现，可以VGA显示比卡丘，可以随意的修改图形阵列和位置-VGA display, using Verilog to achieve, you can VGA display Bikachu, you can modify the graphics array and location
spi
- 用vhdl编写的spi接口程序，在epm7128上仿真成功。
crc_16
- 利用verilog实现的一个（2,1,2）卷积码的编码器,很有用的哟!
dac
- here i attached the digital to analog converter program
cordic
- CORDIC数字计算机的设计，非常实用，一种简单的方法实现了CORDIC数字计算机的设计-CORDIC digital computer design, very practical, a simple method to realize the CORDIC digital computer design
zsjk
- 可以根据不同的注水要求，灵活预置不同的注水时间，实时监控和动态直观显示当前的注水时间信息，当注水完成时，提供远程报警功能。-According to different water requirements, flexibility preset different injection time, real-time monitoring and dynamic visual display of the current injection time information, when the