资源列表
btn
- 按钮控制,自己在Spartan-3e板上测试用的-Button control, their testing in the Spartan-3e board used
uart_altera
- 本程序使用vhdl语言编写，能够实现ALTERA CPLD-EPM3128A与PC机之间的串口通讯功能。-This program written in vhdl language of ALTERA the CPLD-EPM3128A between PC and the serial communication function.
xiaodou_fpga
- fpga的按键消抖程序，用硬件描述语言实现，可以用在按键控制的fpga上。-fpga key debounce procedure, using hardware descr iption language, can be used in the control buttons on the fpga.
key_debounce
- verilog实现的按键消抖源代码，初学fpga的可以学习下-implementation of key debounce verilog source code, beginners can learn from fpga
CPU
- 这个CPU具有简单的指令集，我们可以使用简单的例子进行测试。为简单起见，我们只考虑CPU内部的关联，寄存器、存储器和指令集。那么我们就只考虑一下部分：读写寄存器，读写存储器和执行指令。-This CPU has basic instruction set, and we will utilize its instruction set to generate a very simple program. For simplicity, we will only consider the rela
encoder104
- 独热码到二进制代码的转换即10输入4输出的二进制编码器的verilog程序。-One-hot code to binary code conversion, or 10 inputs 4 outputs the binary encoder verilog program.
uart_altera
- EPM3128与PC机进行串口通讯。使用VHDL语言描述了RS232C的信号传输过程。-EPM3128 and PC for serial communication. Using VHDL language describes the RS232C signal transmission process.
spreadcdma
- spread spectrum cdma materials
VHDL
- 译码器。半加器，全加器。。。包括源程序和仿真波形-Decoder. Half adder, full adder. . . Including the source and the simulation waveform
Verilog
- Verilog基础知识,很有用，pdf版本，适用于初学者 -Verilog basics
简易数字钟
- 基于basys3的简易数字钟，可用于vivado开发环境入门，功能有计时和显示模块。(Basys3 based simple digital clock, vivado development environment can be used for entry, function, timing and display module.)
LCD_VHDL
- cpld fpga 程序 vhld程序 lcd显示 代码