资源列表
test
- PPM编码的VHDL实现，可实现8位并行输入数据转换为串行的PPM编码-PPM coded VHDL implementation can be realized 8-bit parallel input data into a serial coded PPM
ProgramacionC++
- Libro de programacion C-Libro de programacion C++
Verilog_Gotchas_Part2.pdf
- This paper documents 38 gotchas when using the Verilog and SystemVerilog languages.
nios
- 用HDL写的跟NIOS一样好用的CPU软核-NIOS软核
ChipScope_Pro
- 学习ISE开发环境里在线示波器chipscope的一个初级资料，里面有两个例子，我就是通过这个熟悉这个东西的，相信你也可以-ISE developed online learning environment as a primary data chipscope oscilloscope, there are two examples, I am familiar with this thing through this, I believe you can
fifo_chipscope
- 学习FIFO的初级资料，代码工程在ISE10.1上运行，还有在线示波器chipscope的步骤指导哦！-Study of the primary data FIFO, the code works ISE10.1 run, there is scope chipscope step online guide Oh!
virtex5
- Virtex® -5 devices are configured by loading application-specific configuration data—the bitstream—into internal memory. Because Xilinx FPGA configuration memory is volatile, it must be configured each time it is powered-up. The bitstream is l
vhdl5
- some vhdl sourcecode for freshmen
vhdl2
- some vhdl sourcecode for freshmen
vhdlsourcecode
- some vhdl sourcecode,just for freshmen to read
bcd2bin
- 用Verilog实现二进制码转变为bcd码-binary change into bcd code using verilog language
rs232
- RS232..TRY IT AND TELL ME ...IT WILL WORK