资源列表
wgsph_lab
- DDFS Verilog DDFS Verilog DDFS Verilog DDFS Verilog -DDFS Verilog DDFS Verilog DDFS Verilog DDFS Verilog DDFS VerilogDDFS VerilogDDFS Verilog
spi_test
- 这是一个完整的spi_test测试程序，经过仿真。-This is a spi_test programme.
fir1
- this file consists of simple FIR filter designed with the fixed coefficients
the-music-of-VHDL-programming
- 这个是音乐的VHDL编程，此程序的源代码只是梁祝的配音，将乐谱改变即可能实现所需歌曲的音乐！-This music, VHDL programming, the source code of this program is only Butterfly s voice, will the music change is likely to achieve the desired songs music!
MEMORIA_LUT
- THIS CODE SHOWS HOW TO USE THE LUT IN A SPARTAN FPGA AS MEMORY.
ssji
- 1．基本要求 （1）频率测量 测量范围:1HZ~1MHZ,信号为方波等 （2）周期测量 测量范围:1HZ~1MHZ,信号为方波等 （3）具有显示功能。 -A. Basic requirements (1) the frequency of measurement Measuring range: 1HZ ~ 1MHZ, the signal is a square wave, etc. (2) The cycle of measurement Measuring ra
firfilter
- FIR滤波器 用VHDL程序实现数字信号输入后的有限长单位冲激响应滤波,进而再进行其他信号处理-FIRfilter Using VHDL to realize the fir filter
led1
- 基于FPGA编程的流水灯，很适合初学者入门的初学者学习与使用，欢迎大家下载-The scope of this document is, to define the content of the physical layer and the basic characteristics of the physical medium, for communication according to the Controller Area Network protocol specificati
B_to_D
- 用VHDL语言将二进制数据转换成十进制数据，并将十进制的每一个位分离出来单独存放。使用状态机实现，程序简单，仿真效果很理想，占用可编程器件的资源较少。
Flash
- pico blaze assembly code for write to micro SD flash with spi protocol
divn
- 除頻器, 輸入正整數n,clock 輸出clock -div a clock by n
ROM-based-sine-wave-generator-of-the-design-the-u
- Rom based Sine wave generator