资源列表
duoxiangchouqu
- 该程序采用多相分解方式实现的抽取器滤波器，该抽取器的运行速度要比向下采样器的通常FIR滤波器的速度快R倍。-The program uses polyphase decomposition way to achieve the decimation filter, the speed of the extractor runs faster than the down sampler of the FIR filter is generally faster R times.
tmx
- LCD1602显示频率计，vhdl语言编写，可移植模块-LCD1602 display frequency meter, the VHDL language, portable module
pinlvji
- 1．基本要求 （1）频率测量 测量范围:1HZ~1MHZ,信号为方波等 （2）周期测量 测量范围:1HZ~1MHZ,信号为方波等 （3）具有显示功能。 -A. Basic requirements (1) the frequency of measurement Measuring range: 1HZ ~ 1MHZ, the signal is a square wave, etc. (2) The cycle of measurement Measuring ra
sl.v
- 路灯控制器 采用了状态机的概念编程，其中采用了信号检测进程防止干扰信号驱动芯片工作-lights controller state machine used the concept of programming, where the signal detection processes to prevent signal interference driver chips work
coverlater
- 本程序是在Quartus7.2环境下编译的一个简单的(2,1,3)卷积码，能够成功地编译和仿真。
Quartus4
- 1实现六个数码管串行扫描电路 2六个数码管滚动显示电路-1 to achieve the six digital control circuit 2, six serial digital scanning tube rolling display circuit
plj
- --文件名：PLJ.vhd。 --功能：4位显示的等精度频率计。 --最后修改日期：2004.4.14。 -- File Name: PLJ.vhd.- Function: 4 display of equal precision frequency meter.- Last modified date: 2004.4.14.
vhdl
- 串并转换和PN码产生的VHDL程序 希望对刚学习VHDL语言的同学有帮助！-And the PN code string and convert VHDL program generated just want students to learn VHDL, help!
motor_PWM
- 直流减速电机控制程序，采用VHDL语言编写，测试成功-DC gear motor control program, using the VHDL language, the test is successful
CarryLookaheadAdder64
- 一个64位超前进位加法器，verilog语言描述。-A 64 bits carry look ahead adder, verilog
dianzishizhong
- vhdl语言编写实现的数字电子钟程序代码-vhdl language code to achieve the electronic clock
VHDL02
- 加法器和全加器参考程序，由VHDL代码编写。初学者可以看一看。内容无毒，下载请杀毒使用。-Adder reference procedures, prepared by the VHDL code. Beginners can take a look at. Content-free, download antivirus, please use.