资源列表
shiyan
- 使用FPGA设计的一种跑表，但只是用来实验上的仿真-FPGA design using a stopwatch, but only for simulation on
shuzizhong
- 数字钟，校时较分，显示,用元件例化写的vhdl文件，两个24进制，1个60进制计数器-Digital clock, when the school over the points, show cases with elements of writing vhdl file, two 24-band, a 60-ary counter
PCB(Cadence)
- * DEscr iptION: DDS design BY PLD DEVICES. * * AUTHOR: Sun Yu * * HISTORY: 12/06/2002 *-* DEscr iptION : DDS BY PLD design Online. * * AUTHOR : Sun Yu * * HISTORY : 12/06/2002 *
ZLG_Verilog
- 周立功verilog编程参考指南，对编程很有帮助，-Ligong weeks programming verilog reference guide for programming very useful
urat
- uart serial communication
Intro_VHDL_v2.0_notes.pdf
- document help for langage VHDL
lcd_control2
- 这个是LCD的vierlog控制器的设计程序，比较通用，-This is the vierlog LCD controller design procedure is relatively common,
Verilog_golden
- verilog golden经典verilog教程，此为中文版-verilog tutorial verilog golden classic, this is the Chinese version
12864
- 使用FPGA对12864模块进行驱动控制的程序-Use the FPGA to drive on the 12864 module control program
zhouligongVerilog
- 附近为周立功公司的FPGA基于Verilog语言的教程，其中附带了许多例程，特别适合初学者学习-Zhou, who near the company' s FPGA-based tutorials Verilog language, which comes with a lot of routine, especially for beginners to learn
Verilog
- 基于FPGA的SOPC的学习教程，本人找了N久才找到的，希望能帮助到有需要的朋友-SOPC FPGA-based learning tutorial, I looked for a long time to find N, and intend to help a friend in need