资源列表
DE2_TV
- altera d2e tv example
shiyan_5_1
- 这是一个VHDL写的数码管扫描程序，本人在实验平台上验证无误，原版。-This is a write VHDL digital scanner, I verify and correct the experimental platform, the original.
demo6-beep
- ep2c8q208的蜂鸣器程序，主要用在ep2c8q208芯片。-ep2c8q208 the buzzer programep2c8q208 the buzzer programep2c8q208 the buzzer programep2c8q208 the buzzer program
3_05_SPI_Wr_Rd
- SPI读写实验，verilog源码，编译通过，有需要的拿去用-SPI source code
Nios
- 利用Quartus II实现基于Nios的CPU软核设计实现。包括基本原理和实现代码。-Make use of Quartus II realization to design a realization according to the Nios CPU soft pit.Include basic principle and carry out a code.
Sinusoidalsignalgenerator
- 用硬件描述语言vhdl中的ROM模块实现正弦信号发生器 -Sinusoidal signal generator
wtut_ver.ZIP
- 码表程序，完整的verilog工程文件，完整的工程设计流程，包含时序约束，ip核的嵌入，以及DCM模块的使用-Stopwatch program, complete verilog project file, complete engineering design process, including the timing constraints, ip nuclear embedding, as well as the use of DCM module
Viterbi_Implement
- Viterbi decoder實現解說及源碼-Viterbi decoder Implement & source code
demo6-beep
- demo6 蜂鸣器实验 蜂鸣器演奏音乐-demo6 buzzer buzzer experiment playing music
A-Memristor-SPICE-Model
- 一篇讲述如何在pspice软件中仿真忆阻器（memristor）替代蔡氏混沌电路中的非线性电阻进而观察研究混沌相图的文献-How about a software simulator pspice memristor (memristor) alternative Chua' s chaotic circuit chaotic nonlinear resistance and then observe the phase diagram of the literature
led_water
- 酷睿系列流水灯通用程序，来回往返流水，点亮led(ledwater for ep2c8q208c8)
LIP1122CORE_irpwm
- Verilog PWM code module