资源列表
wb_conmax_latest.tar
- WISHBONE总线的接口实现，采用Verilog完成。能同时连接8个主设备和16个从设备。-WISHBONE bus interface, the use of Verilog to complete. Can simultaneously connect up to 8 masters and 16 slaves.
ps2_key_dds_50M
- 利用xilinx开发板，使用嵌入式系统，编写的ps2键盘和利用dds原理产生正弦波的程序-Using xilinx development board, the use of embedded systems, the preparation of the ps2 keyboard and use the procedures dds elements of the sine wave
VGA
- 相关的VGA设计知识与实例。设计时需要的话可以参照参照-VGA related design knowledge and examples
UART_based_on_VHDL
- 本模块的功能是验证实现和PC机进行基本的串口通信的功能-The function of this module is to realize the UART communication between PC and terminal
Traffic_light
- this code for traffic lights system which is very widely used here.hope the code helps-this is code for traffic lights system which is very widely used here.hope the code helps
VerilogPreprocessing
- 使用 Perl语言 ,采用面向对象的编程 (OOP) 方法 ,讨论了一种 Verilog预处理工具的设计.-Using the Perl language, object-oriented programming (OOP) method, discussed the design of a Verilog preprocessing tool.
char.tar
- 传输线路逻辑，采用first in first out 算法进行data传输-fifo
lab3_adding_ip
- xilinx embeded添加ip的源程序,包括工程文件-xilinx embeded adding ip
VGAcolorgenerator
- vhdl语言描述的VGA显示彩条发生器-VGA display color bars generator based on VHDL
lcd1602
- 艾米电子的液晶1602的Verilog语言程序 -Amy e-LCD 1602 of the Verilog language program
vga
- 艾米电子的VGA显示verilog程序。 -Amy VGA display verilog program