资源列表
using_the_LUT_as_distributed_RAM_in_Spartan-3_FPGA
- 在 Spartan-3 系列 FPGA 中将查找表用作分布式 RAM-using_the_LUT_as_distributed_RAM_in_Spartan-3_FPGA
multi8x8
- 通过元件例化语句和信号声明实现8*8的乘法器-Cases through the components of statements and declarations to achieve the signal multiplier 8* 8
fulladder
- 由四位全加器通过元件例化语句设计成十六位的全加器-By four full adder component instantiated by statements designed 16 of the full adder
sin_gene
- 读取mif方式,产生正弦信号的vhdl程序-Read mif way to generate sine signal vhdl program
PLD_Programmable_Logic_Devices
- 可编程逻辑器件PLD Programmable Logic Devices不错的资料-Programmable logic devices PLDPLD Programmable Logic Devices good information
freqmeter
- Working Frequencymeter, some files are useless, you just have to look to total.vhd and see what s usefull or not!
2222
- 12时钟数码管显示,芯片74161,151,248-12 clock digital display, chip 74161,151,248
usb_cy7c68013_connect_to_PC_Source_Code
- usb_cy7c68013与PC通信源码-usb cy7c68013 connect toPC-- Source Code
C28xSoftwareTestBench(STB)Library
- This library contains the support modules for Software Test Bench (STB) framework.
Debussy_simulation_quick_guide
- Debussy仿真快速上手教程,2010 word修正版。
TAP4
- JTAG TAP Statemachine verilog code
TAP3
- JTAG TAP Statemachine verilog code
