资源列表
rs232
- 基于RS232的串口传输程序，开发环境为vivado-RS232-based serial transmission procedures, the development environment for vivado
addersubtractor
- 用verilog语言编写并通过综合验证的加法减法器的工程目录-the design and implementation of addersubtractor using verilog
usb
- 红色飓风四代开发版USB操作的开发例程，对于fpga开发者应该会有一定帮助的，我分享上来 -The red hurricane four generations Developer Edition USB operation developed routines, fpga developers should have some help, I share up
Digital-IF-Receiver-Based-on-FPGA
- 基于FPGA的数字中频接收机设计与实现。近年来雷达行业提出了软件雷达的概念，数字技术在雷达中的广泛应用已成为一种必然趋势。现代雷达系统对接收机提出了更高的要求，数字接收机技术已成为实现高精度宽带雷达接收系统的一种有效途径。研究了数字接收机的相关理论和技术，介绍了数字下变频，数控振荡器、级联积分梳状滤波器和抽取。给出了一种基于FPGA的数字中频接收机实现方案，进行了分析和仿真，给出了测试结果-Design and Implementation of Digital IF Receiver Base
Serial-communication-with-PC
- 基于FPGA的用VHDL语言编写的串口与电脑通信程序-FPGA-based serial port using VHDL language and computer communication program
labor_6
- Sistema de logica secuencial implementada en vhdl
ep1c12_29_dds
- DDS设计：该程序完成了在Quartus Ⅱ上使用VHDL语言实现的DDS波形调制设计-DDS Design: The procedure is completed in Quartus ii the DDS waveform modulation design using VHDL language
dds-5
- 基于FPGA cyclone III EP3C16F484C6的dds正弦波发生器，频率可调-the dds sine wave generator based on the FPGA cyclone III EP3C16F484C6 , frequency adjustable
8x8led
- 基于FPGA的8X8点阵控制，显示字符。verilog语言-FPGA 8X8点阵，verilog
fib_shulie
- 能够产生雯波契那数列，并在LED数码管上显示-Wenbo Qi series that can generate and display in the LED digital tube
control_motor
- motor control for spartan3e fpga board vhdl working code-motor control for spartan3e fpga board vhdl working code....
tlv5638_ise12migration
- 使用SPI通信协议，quartusII开发环境，编写5638驱动-Using SPI communication protocol, quartusII development environment, the preparation of 5638 drivers