资源列表
max2
- maxii里面有MAXII 所有CPLD的引脚封装，功能描述，以及其他的一些功能介绍，是学习CPLD的很不错的资料-MAXII
eda
- 8bit code clock 是一种8位密码锁，有不错的仿真和编译功能，对我们的学习EDA又很大帮助-EDA
ALU.zip
- VHDL实现cpu核心逻辑与运算单元模块的实现，完成4bit*4bit输入8bit输出的运算，可做加减乘除逻辑移位6种操作,the implementation of Arithmetic and logic unit based on VHDL, can do as the adder,subtractor,multiplier,divider,shifter and logic operation.
simple_spi
- 广泛使用的spi总线描述，里面详细的列出了其协议，以及相应的verilog代码实现-Spi bus descr iption widely used, which is a detailed list of their agreement, and the corresponding verilog code implementation
LCD12864
- 1 fpga驱动lcd液晶12864的verilog源程序 (显示英文，可以在源程序中直接修改成自己想要显示的英文) 2 引脚配置完成，程序已经测试，完全好用 3 使用的FPGA芯片是altera的max2EP2C5T1-1 fpga driver' s verilog source code 12864 lcd LCD (display in English, you can directly modify the source program into what you w
BIN_BCD
- 用硬件描述语音实现二进制数据转换成BCD数据-Using hardware descr iption voice to achieve the binary data into BCD data
register
- 采用Verlog编写的仿8086通用寄存器。包含了AX,BX,CX,DX,BP,SI,DI,SP八个通用寄存器，并且前四个可通过W-B选择为高八位或低八位-With Verlog written in imitation of 8086 general-purpose registers. Contains the AX, BX, CX, DX, BP, SI, DI, SP eight general purpose registers, and the first four by the W
ps2_agreement
- 这是关于键盘和FPGA接口的协议的解读，中英文都有，非常详细，适合要写ps2接口的人-This is the interpretation of the Agreement on the keyboard and FPGA interfaces, the English have, in great detail, for people to write ps2 interface
ldpc_encoder_802_3an_latest.tar
- LDPC encoder in verilog
ldpc_encoder_802_3an_latest.tar
- 适用于10GBase-T的以太网(802.3an协议)LDPC, VERILOG语言编写，可以应用在LATTICEXP2系列芯片上，基于Gallager算法。-LDPC encoder for 10GBase-T Ethernet (802.3an), based on Gallager s A algorithm
xulie
- EDA实验中序列发生器的VHDL语言，包括了源程序，仿真波形，有助于EDA的学习-EDA test sequence generator in VHDL, including source code, simulation waveforms
uart_top
- 串口驱动程序，quartusII9.1开发。-Serial port driver, quartusII9.1 development.