资源列表
iic_v2_00_a
- 基于赛林思FPGA的IIC接口设计，支持主机、从机、多主机通信的总线特性，包括datasheet，C语言源代码。-Sailin Si FPGA-based IIC interface design to support the host from the machine, multi-master communication bus features, including the datasheet, C language source code.
VGA_COLOR_LINES
- 利用Verilog语言写的VGA彩条显示控制电路，显示器模式：1280X1024@60HZ.按下K1，K2键可控制彩条显示的模式-Use Verilog language is written VGA display control circuit, striped display mode: 1280 X1024 @ 60 HZ. Press the K1, K2 key can control the color display mode. Article
VGA
- THIS IS VERILOG VHDL VGA FILE USING THIS FILE VERY GOOD
FPGA_vhdl_fir
- 本文讨论了用vhdl的方法设计并研究优化了FIR滤波器，非常实用，欢迎下载-This article discusses ways of using vhdl design and optimization of the FIR filter is very useful, please download
RD1054
- i2c接口的master ip 适用于lattice的器件-i2c master ip interface device for lattice
stopwatch
- 一个用VHDL编写的秒表程序，可用Max+PlusII仿真-Prepared by a stopwatch with VHDL procedures, Max+ PlusII simulation can be used
8250
- 8250芯片功能的程序设计，适用于课程教学辅助以及个人爱好-8250 iner
VGAps2final_change
- 用VHDL写的一个小游戏，能够支持视频显示，对初学者有些帮助吧
ps22
- ps2键盘控制器的VHDL代码，个人感觉还是有一定的借鉴价值的，和大家分享一下吧。-ps2 keyboard controller VHDL code, personal feelings, or have a certain reference value, and share with you Bar.
boxin
- 基于DDS的正弦波形发生器频率在DAC芯片速度的的情况下可以实现大范围的连续可调-FPGA
Lab2
- Simple ALU Objectives 1. Explore simple ALU structure. 2. Working with components 3. Working with language templates in ModelSim 4. Making a test bench and simulation using ModelSim
DCM
- 详细介绍了基于XILINX公司FPGA时钟管理模块DCM的IP核生成和使用-xilinx ise DCM