资源列表
DCountingParallelLoad
- DCountingParallelLoad
ADD_lab_manual_2K8
- This Advance Digital Design Manual, that is taught in our University, it takes from the basic to the advance in Verilog Programming using Modelsim IDE, very good for self learning-This is Advance Digital Design Manual, that is taught in our Universit
nn_pid
- 这是一个bp神经网络+PID控制器对飞行器控制系统的VHDL程序，其中模块并不完全，但大体模块都有，很有参考意义-This is a bp neural network controller for aircraft control system+PID VHDL program, which the module is not complete, but generally module has great reference significance
06135529
- A High Speed Low Power CAM With a Parity Bit and Power-Gated ML Sensing
VHDL-Lab1
- It is a good programming tech to design fpgas and ICs.
LCD12864
- LCD12864显示 verilog hdl编译已通过 编译器 Quartus II 9.0sp2 所有文件已包含-LCD12864 Show verilog hdl compiler has compiler Quartus II 9.0sp2 through all the files included
alarm
- 1．6个数码管动态扫描显示驱动 2．按键模式选择(时\\分\\秒)与调整控制 3．用硬件描述语言(或混合原理图)设计时、分、秒计数器模块、按键控制状态机模块、动态扫描显示驱动模块、顶层模块。要求有闹钟定闹功能，时、分定闹即可，无需时、分、秒定闹。要求使用实验箱左下角的6个动态数码管(DS6 A~DS1A)显示时、分、秒；要求模式按键和调整按键信号都取自经过防抖处理后的按键跳线插孔。
LAB5
- 七人表决器 七个按键，若按下个数多于三个，表示通过，LED点亮-Seven voting machines seven keys, press the number if more than three, said that through, LED lights
image-new
- this coding is very effectively used for the image compression technique in vhdl
LED_shining
- 实现LED灯交替闪烁，已通过Diamond环境仿真与FPGA硬件测试-LED lights flash alternately implemented, Diamond has passed the test environment simulation and FPGA Hardware
fifo_vhdl
- 基于vhdl语言实现的fifo控制器。经过仿真及实际测试-failed to translate
Introduction_to_CPLD_and_FPGA_Design
- CPLD和FPGA的使用方法有详细的介绍！！！大家快来下载吧-The use of CPLD and FPGA methods in detail! ! ! Come everyone to download it