- GENERATESIGNALS This is Matlab program generate different Signal waves
- 58231759tone this is a matlab program for image processing such as image enhancement and segmentation
- transfer 将yuyv422格式的yuv数据转换nv12或者nv21数据格式的yuv数据
- LT_simBIAWGN LT编码过程的实现方法
- ghinhocongviec memo android project
- usbconnchip-proj Xilinx XC2VP20 FPGAs USB interface sources
资源列表
VGA
- 用fpga驱动vga，共两个实验，代码齐全功能完整，用quartus以工程形式打开-Fpga driver vga, a total of two experiments, the code is fully functional and complete quartus open form of engineering
fftEXAMPLE
- fast fourier transformation example code, i have got it from my friend . hope it might helpful to you guys.
vhdl-Algorithm-Hard-wired-logic
- 大型数字系统设计中，vhdl中从算法到硬线逻辑实现的教程-Large-scale digital system design, vhdl from hard-wired logic algorithm to realize the Tutorial
DF2C8_13_DS18B20
- verilog实现单总线DS18B20温度测量-verilog DS18B20 temperature measurement single-bus
910201
- 使用SOPC Builder 快速建立 Embedded System-SOPC Builder to quickly create the use of Embedded System
FPGA
- FPGA 步进驱动模块的开发设计 适合技术开发参考-The development of FPGA design stepper drive module reference for technology development
VHDLwrkshp
- Workshop vhdl code from Esperan
altera-usb-blaster--win7
- usb blaster驱动，FPGA下载器的驱动程序，本人亲测win7可以使用，xp更没的说-usb blaster driver, FPGA download device drivers, I can use win7 pro-test, but did not say xp
VHDL-Xilinx-ISE-a-ModelSim
- VHDL上机手册（基于Xilinx ISE & ModelSim）-VHDL-on manual (based on the Xilinx ISE & ModelSim)
qiangdaqi
- 基本功能： 1. 八路抢答器，同时供8个选手参赛，编号分别为1到8。每位选手用一个答题按钮和LED灯，选手按下时其灯亮。 2. 给主持人一个控制开关，实现系统的复位、抢答开始和分数清零。 3. 具有数据锁存和显示功能。抢答开始后，如果有选手按下了抢答按钮，其编号立即锁存并显示在LCD液晶显示屏上。此外，禁止其他选手再次抢答。选手的编号一直会保存，直到主持人清除。 -Basic features: 1. Eight Responder, while for eight contes
Lab_01_demux
- ITS THE DEMUX OF 4 BIT WRITTEN IN VHDL BASED ON DIGILENT XYLINX 14.2
I2C_test
- FPGA EP2C5Q288C8 I2C 原码,测试OK 打开即用.-FPGA EP2C5Q288C8 I2C original code, test that is used to open OK.