资源列表
sdr_verilog
- 用Verilog实现SDR_SDRAM的控制器,可用FPGA实现对普通SDRAM的读写操作!-SDR_SDRAM using Verilog implementation of the controller, the FPGA can be used to achieve the ordinary SDRAM read and write operations!
FPGA_Materials
- FPGA Materials vhdl application
simple_sin
- The module is a synchronized rom which store the sinc wave in the cell.
project
- Cobra-H128 密码的加密和解密.输入端口e=0,加密；输入端口e=1,解密。128位的块输入和4个64位的密钥-realization of encryption and decryption of Cobra-H128 cipher
AlteraFPGA
- quartus II 软件入门和进阶，是《ALtera fpga_cpld 设计》（基础篇）-quartus II software, introductory and advanced, is " ALtera fpga_cpld design" (Basics)
verilog_hdl_135_examples
- verilog的135个常见电路源程序，非常实用-verilog source circuits of the 135 common and very practical
verilog_suanfa_xiaojie
- verilog算法设计以及FPGA设计的一些注意事项-verilog algorithm design and FPGA design matters needing attention
verilog
- 王金明verilog算法设计教程的配套源程序与答案-Wang Jinming algorithm design tutorial verilog source code and answers matching
Verilog_sdram
- Verilog写的SDRAM接口控制资料希望对大家有用！-Verilog write SDRAM interface control information for all of us hope!
vhd_design
- 我学习VHDL的课程设计，是多功能数字钟，有闹钟，秒表等功能，多指教-I learned VHDL course design is multi-functional digital clock, there is an alarm clock, stopwatch functions, multi-Zhi Jiao
seven_seg
- Verilog, 7segment, ISE
VerilogProject
- 开发环境为Xilinx的Ise,都是一些经典的Verilog工程实例，对初学者有一定借鉴意义！-verilog project under ise environment