资源列表
32位-33M 从模式(target)PCI接口参考设计_lattice
- 32位/33M 从模式(target)PCI接口参考设计，Lattice提供。由于PCI时序较复杂，此设计仅能供参考-32 / route from the model (target) PCI reference design, Lattice provided. Because PCI timing more complicated, and the design for reference only
synthesizable-circuit-design
- 天津大学VLSI系统设计讲义的一部分，作者魏继增，使用Verilog语言-Part of VLSI system design course handout of Tianjin University, by Wei Jizeng, in Verilog language
action_vip_uart
- FPGA串口使用程序，通过调试验证，直接调用即可，方便使用-FPGA UART
FPGA-CPLD--learning-book
- 学习FPGA的入门资料，很全面的讲解，几个资料都很好-FPGA learning introductory information, very comprehensive explanation, several data are good
VHDL
- 基于fpga的串口通信。串行数据收发的同步控制。-Fpga-based serial communication
qiangdaqi4ren
- 运用VHDL语言编写的程序，实现四人抢答的功能。-Programs written using VHDL language, to achieve four answer in the function.
VerilogDHL
- VerilogHDL教程，很详细全面的Verilog教程，循序渐进，由浅入深，十分好的学习资料-VerilogHDL tutorial, very detailed and comprehensive Verilog tutorial, step by step, progressive approach, a very good learning materials
MUl
- 自己编写的单周期16位乘法器源代码，作为普通51单片机的“协处理器”可以实现普通51的实时音频FFT-16bit multiplier source code I have written a single cycle, as the ordinary 51 single-chip coprocessor can achieve a common 51 real-time audio FFT
h264 Verilog
- h264 Verilog,用fpga实现基本档次功能。
environment
- VHDL开发环境，四人抢答器，实现了四个人能同时抢答的功能。-VHDL development environment Answer four, and the realization of the four functions at the same time Answer.
14.Anvyl_PmodDA2_Demo
- 用VHDL写的da程序，使用与xilinx开发板。-Da program written using VHDL, use and xilinx development board.
seryal2paraller
- SERYAL TO PARALEL CINVERT VHDL ISE