资源列表
AM30LV0064D_22203
- 介绍了FPGA对AM30LV0064D_22203 NAND FLASH的读写控制，在xilinx下运行通过
My_DES3
- a triple-DES (Data Encryption Standard) hardware descr iption in verilog-HDL with testbench
FPGA7_UART
- 基于FPGA Verilog UART接口数据传输-Based on the FPGA Verilog UART interface data transfer
paobiao
- 数字跑表，VHDL语言描述，已经过实验,包含有分频计、计数器，显示译码器-It has been tested,and it is described by VHDL.
CoreCFI
- VERILOG编写的CoreCFI实验例程，包括整个工程，可以直接使用-Prepared CoreCFI VERILOG test routines, including the whole project, can be used directly
canbus
- CAN通信协议的硬件描述语言代码，用于FPGA的总线接口控制器开发-CAN communication protocol of the hardware descr iption language code for the FPGA bus interface controller development
Part3
- This program is developed for altera DE2 board. It consist of a real time clock with time set and reset.
I2C
- I2S interface in VHDL
uart-232
- 基于ISE10.1设计的串口接收程序和用LED显示接收到得串口数据-The programs of serial port based on ISE10.1.
mb
- xilinx公司Microblaze核源文件，版本v7_10_a，语言VHDL，用于FPGA开发和DC综合-xilinx company Microblaze nuclear source file, version v7_10_a, language VHDL, and FPGA development for integrated DC
canbus开发
- can 总线开发源码，可参考
canbus
- canbus verilog实现，原代码文件-canbus verilog implementation, the original source document