资源列表
component_timer_counter
- Quartus环境下基于VHDL元件例化的数字钟程序-Zhong Chengxu digital VHDL component instantiation based on Quartus environment
uart_regs
- an uart example for verilog-an example for verilog
uart
- 基于verilog HDL编写的串口通讯接口uart程序-Prepared based on verilog HDL uart serial communication interface program
openPOWERLINK_openMAC_v1.5.9.6
- powerlink工业以太网协议FPGA解决方案,-FPGA of powerlink protocol
RGLight
- 本程序是基于VHDL的模拟交通灯程序，程序开发环境为ISE-This program is based on the the VHDL simulation traffic lights program, the program development environment for ISE
another
- 这是一个用数码管显示的verilog语言描述的数字秒表，且引脚已经分配完毕，基于DE2，可直接下载到板子上使用-This is a digital stopwatch with digital display verilog language described, and the pins have been fully allocated, based DE2, can be directly downloaded to the board
pro019
- ChipScope使用示例 简介：本示例中使用了一个ChipScope IP，将BIT文件配置到FPGA中后，可以启动 ChipScope Pro Analyer 捕获FPGA中数据，并显示如图所示。
DHT11
- verilog实现DHT11温湿度的读取(The realization of DHT11 temperature and humidity reading by Verilog)
uart_regs
- 通过动手实践，熟悉使用Quartus II设计FPGA的方法-By hands-on practice, familiar with the method of using Quartus II design FPGA
fft
- 基于FPGA的FFT的硬件实现。其中含有部分vhdl程序，本论文采用基4FFT算法-FPGA-based hardware implementation of the FFT. Vhdl part which contains the procedures used in this paper-based algorithm 4FFT
DSB3
- 利用ISE软件编写的Verilog程序，可以进行信号的双边带调制-Using ISE software program written in Verilog, can be bilateral with a modulation signal
VhdlPansong
- 一本关于vhdl的入门书籍，适用于初学者或者刚刚入门的硬件工程师