资源列表
8051Core
- 8051IP内核的源码，内有vhdl源代码，希望对大家有帮助
Digital-Computer-Arithmetic-Datapath-Design-Using
- Digital Computer Arithmetic Datapath Design Using Verilog HDL
FPGA_DSSS
- 基于FPGA的直扩调制解调器的设计与实现，挺好的！-DS FPGA-based modem design and implementation, good!
tc
- 这是一个tc的安装程序，适合用tc的人，安装简单，运行也很简单。-This is a tc setup for people who use tc simple installation, operation is simple.
vhdl-pipeline-mips_latest
- pip-lined MIPS in vhdl
mima
- 主要是实现电子密码锁的功能，有记忆和错误提示报警功能，较完善地实现密码锁的功能。-Electronic password lock function, memory and error alarm function, the password lock function better.
VHDL-design-seven-people-voting
- 1、 熟悉VHDL的编程。 2、 熟悉七人表决器的工作原理。 3、 进一步了解实验系统的硬件结构。 -1, familiar with VHDL programming. 2, familiar with the seven voting machine works. 3, to further understand the experimental system hardware architecture.
6f041ed721eb
- 简单的dsp与fpga接口代码。emif-Dsp and fpga simple interface code. emif
FFF-IP-Core
- Altera FFT兆核函数的使用说明，希望对大家有所帮助。-The use of Altera FFT trillion nuclear function, we want to help.
VGA_caidai_zifu_juxing
- verilog实现VGA显示的代码，包括驱动，时钟管理，显示的全部，代码中包括三个实例，一个最常见的八个彩带型，一个矩形框，一个魔幻彩带显示实现，全部代码实现。-verilog implementation code VGA display, including the driver, clock management, all of the code displayed include three instances, one of the most common type of eight
8051core
- 基于vhdl的51内核的程序设计，可以进行编译，稍微修改就可以成为自己订制的软cpu.
MovingAverageFilter
- This zip file contains the moving average filter code written in verilog HDL