资源列表
hongsejufengII
- Altera公司的FPGA开发器件,红色飓风II代PCB器件库.DDB。对学习FPGA的同学有帮助。-Altera,FPGA
colny_IFPGA_PCB
- Altera 的飓风II系列的FPGA封装及布局。-The Hurricane Series II Altera' s FPGA package and layout.
DA
- 详细的介绍了DA转换芯片资料,DA转换原理。-A detailed descr iption of the DA converter chip data, DA conversion principle.
FPGA_Board_Reference_Guide_1.0
- annother FPGA ucLinux Board reference design, using Xilinx s Spartan3 FPGA (XC3S400)
Spartan-6_LX9_RevB1
- XILNX SPARTAN-6 MICROBOARD FPGA DEMOBOARD FROM AVNET SCHEMATIC
1000samples-on-verilog
- 1000个Verilog编写的例程~绝对超值!-Routines written in Verilog 1000 ~ absolute value!
Timer_design_XUP
- verilog写的秒计数器,计数结果显示在四个七段四个数码管上,两个作为秒位,两个作为分钟位。-A seconds counter described by verilog, counting results are displayed on the four seven four digital tube, two as second bit, two as a minute bit.
C5E_DEV_KIT_B
- cyclone v5开发板原理图,对学习很有帮助-cyclone v5 development board schematics, helpful for learning
LatticeMico8_v3_0_Verilog
- The LatticeMico8™ is an 8-bit microcontroller optimized for Field Programmable Gate Arrays (FPGAs) and Crossover Programmable Logic Device architectures from Lattice. Combining a full 18-bit wide instruction set with 16 or 32 General Purpose r
Regfile
- 利用Xilinx ISE14.3,用Verilog HDL 语言编写的计算器与寄存器堆程序,在Spartan Ⅲ板上调试通过。-Use Xilinx ISE14.3, using Verilog HDL language of computers and register file program, Spartan Ⅲ board through debugging.
clock--jiaoshi
- 基于verilog简单数字时钟程序,可实现校时,校分功能-Based verilog simple digital clock procedures, can be achieved when the school, school division function
DE2-platform-hardware-audio-playback
- 在FPGA-DE2平台上的纯硬件录音播放实验-Purely on the DE2 platform hardware audio playback experiment
