资源列表
add
- verilog实现的完整的加法器，包括测试文件等(Verilog implements a complete adder, including test files)
DE2-115_labs_vhdl
- DE2-115板上的，lab-exercise的PDF历程-, Lab-exercise of PDF course DE2-115 board
Protecting_FPGA
- How to protect your FPGA design (IP) on SRAM based FPGA s against copying.
calbr_ver_user
- Calibre user manual. All you need to know about using Calibre.
add
- Verilog 语言 加法器仿真调试过，没有任何问题 很简单的FPGA入门。-Verilog adder
xc3s400
- xc3s400芯片详细的英文资料，xc3s400的FPGA开发板使用者必看
Fpga420
- 单片机与fpga通信，用于测试芯片测试仪，基于quartus-SCM and fpga communication tester for testing the chip, based on quartus
cic
- 在MATLAB2007A/SIMULINK环境下用DSP BUILDER8.0实现了五级CIC，解决了溢出问题。生成了可用的VHDL文件。- DSP BUILDER8.0 A 5 stages CIC filer is realized in MATLAB2007A/SIMULINK by using DSP Builder 8.0.The overflow problem is resulved.Useful VHDL files are generated at last.
display
- 摘要本实验室的理解和实现一个简单的由内而外的光栅视频显示。由于填写此实验室,你就应该欣赏一下一个光栅视频显示工作。你的设计将显示一个50x40网格上的文字8x8标准光栅显示和接受输入改变用户控制下面显示的人物。-The objective of this lab is to understand and implement a simple character-based raster video display. As a result of completing this lab, you
zx3016_shiboqi
- vhdl语言编写的示波器，能够显示三角波，方波，锯齿波等波形，能够切换波形-vhdl language oscilloscope can display a triangular wave, square wave, sawtooth waveform, capable of switching waveform
dds
- dds 驱动 ad9851 fpga vhdl-ad9851 dds ad9851 fpga vhdl
uart_latest.tar
- 串口（UART）的verilog源代码，可以供设计参考-Serial port (UART) of the Verilog source code, can be used for reference in design