资源列表
spi_driver_verilog
- SPI控制器RTL级源码，实现标准SPI硬件接口-SPI controller RTL-level source code to achieve the standard SPI hardware interface
DE2_TV_PAL_TO_RGB_DE2
- 从adv7181b译码itu-656格式的YUV 4:2:2信号，调试过的能在DE2上运行的pal转rgb-decode itu-656 4:2:2 YUV format signal from adv7181b
基于fpga的简单cpu
- 可实现多位16位16进制加减，8位乘除，算数逻辑移位等功能的cpu
McGrawHill_VHDL_Programming_by_Example_4th_Ed_upd
- Electronic and system matlab simulation
CIII_EP3C40F780C8_12_Nand_Flash
- SOPC,CycloneIII系列芯片EP3C40F780C8，NIOS II IDE,Nand_Flash实验代码 -SOPC,CycloneIII，NIOS II IDE,EP3C40F780C8，Nand_Flash code
dds3
- 可产生三角波，正弦波，方波并且频率可调节的函数信号发生器-Can generate triangular wave sine wave square wave and the frequency can be adjusted to function signal generator
DAC_SINE_1K
- 用verilog写的控制da输出信号，输出频率为1khz-Da with verilog write control output signal, the output frequency of 1khz
VoteSystem
- 实现计分功能 可以通过不同的按键打不通的分数-Scoring functions I couldn t get through the scores by different keys
squareLoop
- 利用平方环法提取同步载波的FPGA实现的仿真(FPGA implementation of synchronous carrier extraction using square loop method)
MOS--最详细的介绍
- 简单详细的讲述了MOS管的使用与原理，非常适合初学者，学习掌握基本的，常用的MOS管知识(A simple and detailed descr iption of the use and principle of the MOS tube)
filter
- 基于VHDL的FIR数字滤波器的设计，可以自己修改参数设置滤波器阶数-FIR digital filter design based on VHDL, can modify the parameters to set the filter order
web
- 模拟网络串行通信 近期对计算机间通信比较感兴趣，同时研究usb通信原理，起步为串行通信于是想为更好地理解其机理做一定基础性研究，故做了异步串行通信设计实验。 经过QUARTUS验证，获得了一等奖！-Simulation of the recent serial communication network between the communication of more interested in computers, communications usb at the same time