资源列表
adder16bit
- 16位高速加法器，采用verilog语言编写，已经成功仿真，能够运行
xujuxuanzhe
- 还用硬件描述语言设计的数据选择器，现代逻辑器件-Also designed using hardware descr iption language data selector, modern logic devices
DE2-vgadisplay-Verilog
- 在DE2开发板的vga上显示256灰阶图片，带了完整的程序Verilog-DE2 development board VGA display 256 grayscale images with a complete program Verilog
pxp_tlmecrcgen
- 利用CAST公司的IP写出tlmecrcgen的代码-use the case company IP code to write the code of tlmecregen
count_usebasketball
- 一个小程序，用Veilog HDL编写的，可以用于篮球比赛的倒计时牌，已在max-plusII上仿真通过。-a small program, prepared by the Veilog HDL, can be used for the basketball game countdown. have max-plusII on through simulation.
hongwai
- 进行红外遥控器的解码功能，在4个数码管上显示编码信息！！比较实用-this is very useful!!
adder
- 加法器设计，详细的设计步骤-Adder design, detailed design steps
source
- FPGA串口，verilog HDL串口收发程序-FPGA serial, verilog HDL serial transceiver procedures
adc_spartan.tar
- Spartan 3E-1600 ADC and AMP control.
VGAchardisplay
- 基于verilog的VGA字符、汉字、图片显示的程序。-Verilog VGA-based characters, Chinese characters, image display program.
rake_reciever
- wcama rake接收机的matlab仿真。可以作为项目设计的参考matlab代码-wcama rake receiver matlab simulation. Reference matlab code can be designed as a project
fft
- 快速傅里叶变换用verilog语言写的模块，，可以从中可以得到点思路-Fast Fourier transform verilog module, the experiment is available, you can get some ideas