资源列表
DesignThroughVerilogHDL
- design through verilog hdl
Design-Through-Verilog-HDL
- design through verilog HDL by padamanaban
bluetooth_latest.tar
- bluetooth_latest,The aim of this project is to build the bluetooth base band layer. The whole bluetooth hardware and firmware (HCI, controller and LMP) will be implemented in separate project.-bluetooth_latest, The aim of this project is to build the
Borax_BA5_SoC_Kit_Rev2
- 骏龙科技有限公司Borax开发板SoC_Kit的实例程序，适合此开发板的使用者-Cytech technology Borax development board SoC_Kit examples of procedures for the development board users
Verilog
- altera公司推荐的verilog代码风格教程-altera recommended verilog code style tutorial
Verilog_Coding_Style_Proposal
- Altera公司的Verilog HDL 代码编写规范-Altera Verilog HDL code style for the proposed specification
Altera_Verilog_Coding_Style_Proposal_final
- Altera的Verilog 代码规范，讲解的还可以-Altera' s Verilog code specifications, explanations can also be
61EDA_H192
- IRIG-B verilog hdl cheng du wu suo-IRIG-B very good verilog hdl
afg
- this is a docoument of education!
vhdl
- 学习vhdl语言的实用教程，很详细，从零开始学起，简单易行，支持-Vhdl language learning and practical tutorial is very detailed, from scratch to learn, easy to support
vhdlPowerPoint
- 系统介绍VHDL语言，对VHDL的学习非常有用，欢迎大家下载~-VHDL system descr iption language, VHDL is very useful to learn, are welcome to download ~
spartan6 ddr3 controler
- xilinx spartan6 ddr3 test demo